20-bit Interleaved ADC for Direct Sampling in X-ray Spectroscopy

A novel 20-bit interleaved SAR ADC architecture enables direct digitization of preamplifier signals in high-rate X-ray spectroscopy applications. It eliminates analog reshaping stages while achieving sub-150 eV resolution at MHz-level event rates. Designed around a Zynq SoC and tested with the ARDESIA detector, the system demonstrates a robust, low-noise digital pipeline tailored for synchrotron environments and pixelated SDDs.